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Computationally-redundant energy-efficient processing for y'all (CREEPY).

, , , , , , and . ICRC, page 1-8. IEEE Computer Society, (2016)

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Exploring Chapel Productivity Using Some Graph Algorithms., , , , , and . IPDPS Workshops, page 672. IEEE, (2020)Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization., , and . IPCCC, page 372-379. IEEE Computer Society, (2007)StAdHyTM: A Statically Adaptive Hybrid Transactional Memory: A scalability study on large parallel graphs., , and . CCWC, page 1-7. IEEE, (2017)A performance study of the time-varying cache behavior: a study on APEX, Mantevo, NAS, and PARSEC., , , and . J. Supercomput., 74 (2): 665-695 (2018)LMStr: exploring shared hardware controlled scratchpad memory for multicores., , , and . MEMSYS, page 152-165. ACM, (2017)DyAdHyTM: a low overhead dynamically adaptive hybrid transactional memory with application to large graphs., , and . MEMSYS, page 327-336. ACM, (2017)The Superstrider Architecture: Integrating Logic and Memory Towards Non-Von Neumann Computing., , , and . ICRC, page 1-8. IEEE, (2017)Insight into Application Performance Using Application-Dependent Characteristics., , and . PMBS@SC, volume 8966 of Lecture Notes in Computer Science, page 107-128. Springer, (2014)A Methodology for Characterizing the Correspondence Between Real and Proxy Applications., , , , , and . CLUSTER, page 190-200. IEEE Computer Society, (2018)Analyzing Hybrid Transactional Memory Performance Using Intel SDE., , and . CLUSTER, page 627-628. IEEE Computer Society, (2017)