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In-circuit tuning of deep learning designs., , , , , and . J. Syst. Archit., (2021)Customizable FPGA-based Accelerator for Binarized Graph Neural Networks., , , and . ISCAS, page 1968-1972. IEEE, (2022)F-E3D: FPGA-based Acceleration of an Efficient 3D Convolutional Neural Network for Human Action Recognition., , , , , , , and . ASAP, page 1-8. IEEE, (2019)Applications and Techniques for Fast Machine Learning in Science., , , , , , , , , and 77 other author(s). CoRR, (2021)Low Latency Variational Autoencoder on FPGAs., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 14 (2): 323-333 (June 2024)R2CNN: Recurrent Residual Convolutional Neural Network on FPGA., , , and . FPGA, page 319. ACM, (2020)Real-Time Anomaly Detection for Flight Testing Using AutoEncoder and LSTM., , , , , and . FPT, page 379-382. IEEE, (2019)Accelerating Bayesian Neural Networks via Algorithmic and Hardware Optimizations., , , , , and . IEEE Trans. Parallel Distributed Syst., 33 (12): 3387-3399 (2022)LL-GNN: Low Latency Graph Neural Networks on FPGAs for Particle Detectors., , , , , , and . CoRR, (2022)Reconfigurable Acceleration of Graph Neural Networks for Jet Identification in Particle Physics., , and . AICAS, page 202-205. IEEE, (2022)