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Evaluating The Highly-Pipelined Intel Stratix 10 FPGA Architecture Using Open-Source Benchmarks., , , and . FPT, page 206-213. IEEE, (2018)Design, implementation, and verification of active cache emulator (ACE)., , and . FPGA, page 63-72. ACM, (2006)Artisan: a Meta-Programming Approach For Codifying Optimisation Strategies., , , , and . FCCM, page 177-185. IEEE, (2020)Programmable Automotive Headlights., , , , , , and . ECCV (4), volume 8692 of Lecture Notes in Computer Science, page 750-765. Springer, (2014)Fast hierarchical implementation of sequential tree-reweighted belief propagation for probabilistic inference., , , , and . FPL, page 1-8. IEEE, (2015)Specializing for Efficiency: Customizing AI Inference Processors on FPGAs., , and . ICM, page 62-65. IEEE, (2021)Automatic Pipelining From Transactional Datapath Specifications., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (3): 441-454 (2011)Scalable Multi-FPGA Acceleration for Large RNNs with Full Parallelism Levels., , , , and . DAC, page 1-6. IEEE, (2020)Exploration of Low Numeric Precision Deep Learning Inference Using Intel® FPGAs: (Abstract Only)., , , , , and . FPGA, page 294. ACM, (2018)Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs., , , , , , , and . FPT, page 10-19. IEEE, (2020)