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BCH code based multiple bit error correction in finite field multiplier circuits.

, , , , и . ISQED, стр. 615-620. IEEE, (2011)

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Prakash Pradhan

Merina Pradhan

Swapna Pradhan

Anup Pradhan

Amir Man Pradhan

 

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Program Fault Tolerance Based on Memory Access Behavior., и . FTCS, стр. 426-435. IEEE Computer Society, (1991)Modeling of Live Lines and True Sharing in Multi-Cache Memory Systems., , и . ICPP (1), стр. 326-330. Pennsylvania State University Press, (1990)Modified Tree Structure for Location Management in Mobile Environments., , и . INFOCOM, стр. 530-537. IEEE Computer Society, (1995)A Multiprocessor Network Suitable for Single-Chip VLSI Implementation., и . ISCA, стр. 328-337. ACM, (1984)P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP., , , и . ISQED, стр. 176-183. IEEE, (2010)An application specific processor for implementing stack filters., , и . ASAP, стр. 196-199. IEEE, (1993)Recovery in Multicomputers with Finite Error Detection Latency., , и . ICPP (2), стр. 206-210. CRC Press, (1994)Job Scheduling in Mesh Multicomputers., и . ICPP (2), стр. 251-258. CRC Press, (1994)Design of Reversible Finite Field Arithmetic Circuits with Error Detection., , , и . VLSI Design, стр. 453-459. IEEE Computer Society, (2008)A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM., , , и . VLSI Design, стр. 45-50. IEEE Computer Society, (2010)