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Disambiguation of "Esmaeilzadeh, Hadi"

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Towards Statistical Guarantees in Controlling Quality Tradeoffs for Approximate Acceleration.

, , , , and . ISCA, page 66-77. IEEE Computer Society, (2016)

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Dariusch Reza Hadizadeh Kharrazi

Wolfgang Hädicke

Manfred Hädicke

Erich Hädicke

Ulrich Hädinger

 

Other publications of authors with the same name

Memetic Algorithm Based Path Planning for a Mobile Robot., , , and . International Conference on Computational Intelligence, page 56-59. International Computational Intelligence Society, (2004)Restoring the Broken Covenant Between Compilers and Deep Learning Accelerators., , , , , , , , and . CoRR, (2023)Bit-Parallel Vector Composability for Neural Acceleration., , , , and . DAC, page 1-6. IEEE, (2020)Physically Accurate Learning-based Performance Prediction of Hardware-accelerated ML Algorithms., , , , , , , , , and 1 other author(s). MLCAD, page 119-126. ACM / IEEE, (2022)Glimpse: mathematical embedding of hardware specification for neural compilation., , and . DAC, page 1165-1170. ACM, (2022)MESA: Microarchitecture Extensions for Spatial Architecture Generation., , , , , , , , , and . ISCA, page 49:1-49:14. ACM, (2023)General-purpose code acceleration with limited-precision analog computation., , , , , , , and . ISCA, page 505-516. IEEE Computer Society, (2014)Instruction level test methodology for CPU core software-based self-testing., , and . HLDVT, page 25-29. IEEE Computer Society, (2004)Scale-out acceleration for machine learning., , , , , and . MICRO, page 367-381. ACM, (2017)Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks., , , , , , , , , and 2 other author(s). MICRO, page 681-697. IEEE, (2020)