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Variability aware modeling for yield enhancement of SRAM and logic., , , and . DATE, page 1153-1158. IEEE, (2011)Insight to Data Retention loss in ferroelectric Hf0.5Zr0.5O2 pFET and nFET from simultaneous PV and IV measurements., , , , , , , , , and . VLSI Technology and Circuits, page 340-342. IEEE, (2022)Degradation mechanisms and lifetime assessment of Ge Vertical PIN photodetectors., , , , , , , and . OFC, page 1-3. IEEE, (2022)Editing First-Order Proofs: Programmed Rules vs Derived Rules., , and . SLP, page 92-98. IEEE-CS, (1984)Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies., , , , , , , , , and 6 other author(s). ESSDERC, page 102-105. IEEE, (2014)Approximating Standard Cell Delay Distributions by Reformulating the Most Probable Failure Point., , , , and . ERMAVSS@DATE, volume 1566 of CEUR Workshop Proceedings, page 13-16. CEUR-WS.org, (2016)Estimation des titres viraux : une programmation pratique et fiable sur calculatrice de poche, et accessible par l'Internet., and . Monde des Util. Anal. Données, (2006)Reducing Reservoir Dimensionality with Phase Space Construction for Simplified Hardware Implementation., , , , , and . ICANN (10), volume 15025 of Lecture Notes in Computer Science, page 156-167. Springer, (2024)Physics-based device aging modelling framework for accurate circuit reliability assessment., , , , , , , , , and . IRPS, page 1-6. IEEE, (2021)Combining SILC and BD statistics for low-voltage lifetime projection in HK/MG stacks., , , , and . IRPS, page 27-1. IEEE, (2022)