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Disambiguation of "Hiraga, Keizo"

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Optimized Two-Step Store Control for MTJ-Based Nonvolatile Flip-Flops to Minimize Store Energy Under Process and Temperature Variations.

, , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 32 (1): 89-102 (January 2024)

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Keizo Sakamoto

 

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Optimized Two-Step Store Control for MTJ-Based Nonvolatile Flip-Flops to Minimize Store Energy Under Process and Temperature Variations., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 32 (1): 89-102 (January 2024)A Coarse Grained-Reconfigurable Accelerator with energy efficient MTJ-based Non-volatile Flip-flops., , , , , , , and . ReConFig, page 1-6. IEEE, (2018)Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops., , , , , , , , and . MCSoC, page 273-280. IEEE, (2021)A Variation-Aware MTJ Store Energy Estimation Model for Edge Devices With Verify-and-Retryable Nonvolatile Flip-Flops., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (4): 532-542 (April 2023)Impact of fin shape variability on device performance towards 10nm node., , , , , , , , , and 3 other author(s). ICICDT, page 1-4. IEEE, (2015)Energy Efficient Write Verify and Retry Scheme for MTJ Based Flip-Flop and Application., , , , , , , , and . NVMSA, page 91-98. IEEE, (2018)A Non-stop Fault-Tolerant Real-Time System-on-Chip/System-in-Package., , , , and . candar, page 30-39. IEEE, (2023)A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing., , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)Non-Volatile Coarse Grained Reconfigurable Array Enabling Two-step Store Control for Energy Minimization., , , , , , and . COOL CHIPS, page 1-3. IEEE, (2020)