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Early probabilistic noise estimation for capacitively coupled interconnects.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (3): 337-345 (2003)

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Simultaneous Switching Noise and Resonance Analysis of On-Chip Power Distribution Network., and . ISQED, page 163-168. IEEE Computer Society, (2002)Low-power distributed arithmetic architectures using nonuniform memory partitioning., , and . ISCAS (3), page 470-473. IEEE, (1999)Maximum Current Estimation in CMOS Circuits., , and . DAC, page 2-7. IEEE Computer Society Press, (1992)Estimation of maximum current envelope for power bus analysis and design., and . ISPD, page 141-146. ACM, (1998)Early probabilistic noise estimation for capacitively coupled interconnects., , , and . SLIP, page 77-83. ACM, (2002)Maximum power supply noise estimation in VLSI circuits using multimodal genetic algorithms., , and . ICECS, page 1437-1440. IEEE, (2001)Simulation and Optimization of the Power Distribution Network in VLSI Circuits., , and . ICCAD, page 481-486. IEEE Computer Society, (2000)Pre-route Noise Estimation in Deep Submicron Integrated Circuits., , , and . ISQED, page 413-418. IEEE Computer Society, (2002)Analysis of Noise Avoidance Techniques in DSM Interconnects Using a Complete Crosstalk Noise Model ., , , , and . DATE, page 456-463. IEEE Computer Society, (2002)Simulation of physical faults in VLSI circuits., and . VTS, page 202-207. IEEE Computer Society, (1992)