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Disambiguation of "Amagasaki, Motoki"

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An easily testable routing architecture of FPGA.

, , , and . VLSI-SoC, page 106-109. IEEE, (2011)

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Other publications of authors with the same name

Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device., , , , , , , and . VLSI-SoC, page 198-203. IEEE, (2006)A novel physical defects recovery technique for FPGA-IP cores., , , , , and . ReConFig, page 1-7. IEEE, (2012)An automatic FPGA design and implementation framework., , , , and . FPL, page 1-4. IEEE, (2013)A logic cell architecture exploiting the shannon expansion for the reduction of configuration memory., , , , , and . FPL, page 1-6. IEEE, (2014)Fault Recovery Technique for TMR Softcore Processor System Using Partial Reconfiguration., , , , , , and . ICA3PP (1), volume 7439 of Lecture Notes in Computer Science, page 392-404. Springer, (2012)A Bitstream Relocation Technique to Improve Flexibility of Partial Reconfiguration., , , , and . ICA3PP (1), volume 7439 of Lecture Notes in Computer Science, page 139-152. Springer, (2012)High-level Synthesis based on Parallel Design Patterns using a Functional Language., , , , and . HEART, page 23:1-23:6. ACM, (2017)First Prototype of a Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells., , , , , , and . FPL, page 298-303. IEEE Computer Society, (2010)Designing Flexible Reconfigurable Regions to Relocate Partial Bitstreams., , , , , and . FCCM, page 241. IEEE Computer Society, (2012)A novel states recovery technique for the TMR softcore processor., , , , , and . FPL, page 543-546. IEEE, (2009)