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Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications.

, , , и . DAC, стр. 597-602. ACM, (1991)

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Jean Geurts

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Другие публикации лиц с тем же именем

Time Constrained Allocation and Assignment Techniques for High Throughput Signal Processing., , и . DAC, стр. 124-127. IEEE Computer Society Press, (1992)Optimal Scheduling and Software Pipelining of Repetitive Signal Flow Graphs with Delay Line Optimization., , , и . EDAC-ETC-EUROASIC, стр. 490-494. IEEE Computer Society, (1994)Quadratic zero-one programming based synthesis of application specific data paths., , и . ICCAD, стр. 522-525. IEEE Computer Society / ACM, (1993)Chess: retargetable code generation for embedded DSP processors., , , , , , и . Code Generation for Embedded Processors, стр. 85-102. Kluwer, (1994)Loop transformation methodology for fixed-rate video, image and telecom processing applications., , и . ASAP, стр. 427-438. IEEE, (1994)Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications., , , и . DAC, стр. 597-602. ACM, (1991)A Graph Based Processor Model for Retargetable Code Generation., , , , и . ED&TC, стр. 102-107. IEEE Computer Society, (1996)Partitioning-Based Allocation of Dedicated Data-Paths in the Architectural Synthesis for High Throughput Applications., , , и . VLSI, том A-1 из IFIP Transactions, стр. 193-202. North-Holland, (1991)Solving large scale assignment problems in high-level synthesis by approximative quadratic programming., , , и . ACM Great Lakes Symposium on VLSI, стр. 19-24. ACM, (2001)Design of ASIPs in multi-processor SoCs using the Chess/Checkers retargetable tool suite., , , и . SoC, стр. 1-4. IEEE, (2006)