Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

SecSMT: Securing SMT Processors against Contention-Based Covert Channels., , , and . USENIX Security Symposium, page 3165-3182. USENIX Association, (2022)Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management., , and . IEEE Micro, 39 (3): 75-83 (2019)Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization., , and . ASPLOS, page 395-410. ACM, (2019)Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures., , and . PMAM@PPoPP, page 51-60. ACM, (2019)Packet Chasing: Spying on Network Packets over a Cache Side-Channel., , and . ISCA, page 721-734. IEEE, (2020)Agon: A Scalable Competitive Scheduler for Large Heterogeneous Systems., , and . CoRR, (2021)Breaking the ISA Barrier in Modern Computing.. University of California, San Diego, USA, (2018)CHEx86: Context-Sensitive Enforcement of Memory Safety via Microcode-Enabled Capabilities., and . ISCA, page 762-775. IEEE, (2020)I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches., , , , , and . ISCA, page 361-374. IEEE, (2021)Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching., , , , and . ISCA, page 251-264. IEEE, (2021)