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Disambiguation of "Venkat, Ashish"

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SecSMT: Securing SMT Processors against Contention-Based Covert Channels.

, , , and . USENIX Security Symposium, page 3165-3182. USENIX Association, (2022)

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Ashish Shah

Venkat Chandar

Venkat Chandrasekaran

Ashish Shrivastava

Ashish Choudhary

 

Other publications of authors with the same name

SecSMT: Securing SMT Processors against Contention-Based Covert Channels., , , and . USENIX Security Symposium, page 3165-3182. USENIX Association, (2022)Packet Chasing: Spying on Network Packets over a Cache Side-Channel., , and . ISCA, page 721-734. IEEE, (2020)Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures., , and . PMAM@PPoPP, page 51-60. ACM, (2019)Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management., , and . IEEE Micro, 39 (3): 75-83 (2019)Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization., , and . ASPLOS, page 395-410. ACM, (2019)Execution migration in a heterogeneous-ISA chip multiprocessor., , and . ASPLOS, page 261-272. ACM, (2012)CHEx86: Context-Sensitive Enforcement of Memory Safety via Microcode-Enabled Capabilities., and . ISCA, page 762-775. IEEE, (2020)I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches., , , , , and . ISCA, page 361-374. IEEE, (2021)Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching., , , , and . ISCA, page 251-264. IEEE, (2021)Harnessing ISA diversity: Design of a heterogeneous-ISA chip multiprocessor., and . ISCA, page 121-132. IEEE Computer Society, (2014)