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A 32nm 0.5V-supply dual-read 6T SRAM., , , , , , , , , and 5 other author(s). CICC, page 1-4. IEEE, (2010)The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (9): 2010-2016 (2011)A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference., , , , , , and . DAC, page 520-525. ACM, (2003)A Top-Down Microsystems Design Methodology and Associated Challenges ., , , , , and . DATE, page 20292-20296. IEEE Computer Society, (2003)Second-Generation Big Data Systems., , and . Computer, 48 (1): 36-41 (2015)A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology., , , , , , and . ISSCC, page 312-313. IEEE, (2007)An on-chip dual supply charge pump system for 45nm PD SOI eDRAM., , , , , , , , , and 3 other author(s). ESSCIRC, page 66-69. IEEE, (2008)On-chip jitter and oscilloscope circuits using an asynchronous sample clock., , , , , and . ESSCIRC, page 126-129. IEEE, (2008)Understanding system design for Big Data workloads., , , , , , , , , and . IBM J. Res. Dev., 57 (3/4): 3 (2013)A low-voltage, chemical sensor interface for systems-on-chip: the fully-differential potentiostat., , , and . ISCAS (4), page 892-895. IEEE, (2004)