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Making predictive analog/RF alternate test strategy independent of training set size.

, , , , , , and . ITC, page 1-9. IEEE Computer Society, (2012)

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Special session: Hot topics: Statistical test methods., , , , , and . VTS, page 1-2. IEEE Computer Society, (2015)A design-for-test technique for multistage analog circuits., , and . Asian Test Symposium, page 113-119. IEEE Computer Society, (1995)Making predictive analog/RF alternate test strategy independent of training set size., , , , , , and . ITC, page 1-9. IEEE Computer Society, (2012)A multi-converter DFT technique for complex SIP: Concepts and validation., , , , , and . ECCTD, page 747-750. IEEE, (2009)Analysis and Attenuation Proposal in Ground Bounce., , , and . Asian Test Symposium, page 460-463. IEEE Computer Society, (2004)The multi-configuration: A DFT technique for analog circuits., , and . VTS, page 54-59. IEEE Computer Society, (1996)European Network for Test Education., , , , , and . DELTA, page 230-234. IEEE Computer Society, (2002)Digital test of ZigBee transmitters: Validation in industrial test environment., , , and . DATE, page 396-401. IEEE, (2021)Digital Test Method for Embedded Converters with Unknown-Phase Harmonics., , , , , and . J. Electron. Test., 27 (3): 335-350 (2011)Minimizing the Hardware Overhead of a Histogram-Based BIST Scheme for Analog-to-Digital Converters., , , and . LATW, page 118-122. IEEE, (2000)