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Другие публикации лиц с тем же именем

Embedded Diagnostic Logic Test Exploiting Regularity., и . DSD, стр. 873-879. IEEE Computer Society, (2008)A Configurable Modular Test Processor and Scan Controller Architecture., , , , и . IOLTS, стр. 277-284. IEEE Computer Society, (2007)Built-in Self Repair by Reconfiguration of FPGAs., , и . IOLTS, стр. 187-188. IEEE Computer Society, (2006)Hardware/Software Based Hierarchical Self Test for SoCs., , , , , и . DDECS, стр. 159-160. IEEE Computer Society, (2006)Flip-Flops and Scan-Path Elements for Nanoelectronics., и . DDECS, стр. 307-312. IEEE Computer Society, (2007)A Multi-Purpose Concept for SoC Self Test Including Diagnostic Features., , и . IOLTS, стр. 241-246. IEEE Computer Society, (2005)Test Data and Power Reductions for Transition Delay Tests for Massive-Parallel Scan Structures., и . DSD, стр. 283-290. IEEE Computer Society, (2010)Logic Self Repair., , и . ARCS Workshops, том P-81 из LNI, стр. 36-44. GI, (2006)Embedded Scan Test with Diagnostic Features for Self-Testing SoCs., , , , , и . IOLTS, стр. 181-182. IEEE Computer Society, (2006)