( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution.

, , , , , , , , , , , , и . IRPS, стр. 1-5. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Shreya Karmakar

Shreya Kothaneth

Shreya Saxena

Arijit Kundu

Sudip Kundu

 

Другие публикации лиц с тем же именем

Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution., , , , , , , , , и 3 other автор(ы). IRPS, стр. 1-5. IEEE, (2021)SOT-MRAM 300mm integration for low power and ultrafast embedded memories., , , , , , , , , и 9 other автор(ы). CoRR, (2018)STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application., , , , , , , , , и 6 other автор(ы). IMW, стр. 1-4. IEEE, (2021)SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories., , , , , , , , , и 9 other автор(ы). VLSI Circuits, стр. 81-82. IEEE, (2018)Comprehensive Performance and Reliability Assessment of Se-based Selector-Only Memory., , , , , , , , , и 4 other автор(ы). IRPS, стр. 7. IEEE, (2024)Integration of epitaxial monolayer MX₂ channels on 300mm wafers via Collective-Die-To-Wafer (CoD2W) transfer., , , , , , , , , и 10 other автор(ы). VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)First demonstration of Two Metal Level Semi-damascene Interconnects with Fully Self-aligned Vias at 18MP., , , , , , , , , и 5 other автор(ы). VLSI Technology and Circuits, стр. 1-2. IEEE, (2022)Device engineering guidelines for performance boost in IGZO front gated TFTs based on defect control., , , , , , , , , и 10 other автор(ы). ICICDT, стр. 88. IEEE, (2022)Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm., , , , , , , , , и 14 other автор(ы). VLSI Technology and Circuits, стр. 292-293. IEEE, (2022)Lowest IOFF < 3×10-21 A/μm in capacitorless DRAM achieved by Reactive Ion Etch of IGZO-TFT., , , , , , , , , и 1 other автор(ы). VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)