Author of the publication

Pre-Layout Estimation of Interconnect Lengths for Digital Integrated Circuits.

, , and . CONIELECOMP, page 38. IEEE Computer Society, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Exploiting OVL standard assertions in a theorem-proving-based verification environment., , , and . Circuits, Signals, and Systems, page 249-254. IASTED/ACTA Press, (2004)Power Optimization With Power Islands Synthesis., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (7): 1025-1037 (2009)Reliability-Centric High-Level Synthesis., , , , and . DATE, page 1258-1263. IEEE Computer Society, (2005)Derving Intermediary RTLs for Verification of Pipelined Synthesized Designs., , and . VLSI, page 382-. CSREA Press, (2003)Exploiting PSL standard assertions in a theorem-proving-based verification environment., , and . ACM Great Lakes Symposium on VLSI, page 400-403. ACM, (2005)Power Islands: A High-Level Technique for Counteracting Leakage in Deep Sub-Micron., , and . ISQED, page 165-170. IEEE Computer Society, (2006)An ILP Formulation for Reliability-Oriented High-Level Synthesis., , , , , , and . ISQED, page 364-369. IEEE Computer Society, (2005)An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors., , , and . ISCIS, volume 4263 of Lecture Notes in Computer Science, page 267-276. Springer, (2006)A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool., and . FMCAD, volume 1522 of Lecture Notes in Computer Science, page 204-221. Springer, (1998)Reliability-Centric Hardware/Software Co-Design., , , , , and . ISQED, page 375-380. IEEE Computer Society, (2005)