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VLSI implementation of linear MIMO detection with boosted communications performance: extended abstract., , , and . ACM Great Lakes Symposium on VLSI, page 71-72. ACM, (2014)A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators, and Security., , and . IEEE Des. Test, 39 (2): 90-99 (2022)Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators., , , , , , and . CoRR, (2020)VLSI implementation of LS-SVM training and classification using entropy based subset-selection., , , and . ISCAS, page 1-4. IEEE, (2017)A flexible MCMC detector ASIC., , , , and . ISOCC, page 285-286. IEEE, (2016)Fully Virtual Rapid ADAS Prototyping via a Joined Multi-domain Co-simulation Ecosystem., , , , , and . VEHITS, page 59-69. SciTePress, (2018)Extraction of recursion level parallelism for embedded multicore systems., , , and . SAMOS, page 154-162. IEEE, (2017)Combined MPSoC Task Mapping and Memory Optimization for Low-Power., , , and . APCCAS, page 121-124. IEEE, (2019)Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis., , , , , , and . Int. J. Embed. Real Time Commun. Syst., 2 (3): 1-20 (2011)AMAIX: A Generic Analytical Model for Deep Learning Accelerators., , , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 36-51. Springer, (2020)