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Другие публикации лиц с тем же именем

Fault table generation using Graphics Processing Units., и . HLDVT, стр. 60-67. IEEE Computer Society, (2009)Efficient don't care computation for hierarchical designs., , и . ISCAS, IEEE, (2006)Robust window-based multi-node technology-independent logic minimization., , и . ACM Great Lakes Symposium on VLSI, стр. 357-362. ACM, (2009)A design flow to optimize circuit delay by using standard cells and PLAs., , , , , и . ACM Great Lakes Symposium on VLSI, стр. 217-222. ACM, (2006)Sorting Binary Numbers in Hardware - A Novel Algorithm and its Implementation., , и . ISCAS, стр. 2225-2228. IEEE, (2009)Boolean satisfiability on a graphics processor., и . ACM Great Lakes Symposium on VLSI, стр. 123-126. ACM, (2010)Highly parallel decoding of space-time codes on graphics processing units., , , , и . Allerton, стр. 1262-1269. IEEE, (2009)On-chip bidirectional wiring for heavily pipelined systems using network coding., , , и . ICCD, стр. 131-136. IEEE Computer Society, (2009)Accelerating statistical static timing analysis using graphics processing units., и . ASP-DAC, стр. 260-265. IEEE, (2009)Low power and high performance sram design using bank-based selective forward body bias., , , и . ACM Great Lakes Symposium on VLSI, стр. 441-444. ACM, (2009)