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High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/Drain.

, , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)

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Bi1Te1 is a dual topological insulator, , , , , , , , , and 8 other author(s). Nature Communications, (April 2017)Hybrid Nanorobotic Approaches for Fabricating NEMS from 3D Helical Nanostructures., , , , and . ICRA, page 1396-1401. IEEE, (2006)NEUROTEC I: Neuro-inspired Artificial Intelligence Technologies for the Electronics of the Future., , , , , , , , , and 23 other author(s). DATE, page 957-962. IEEE, (2022)Ferroelectric Schottky Barrier MOSFET as Analog Synapses for Neuromorphic Computing., , , , , , and . ESSCIRC, page 121-124. IEEE, (2022)High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/Drain., , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)GeSn Vertical Gate-all-around Nanowire n-type MOSFETs., , , , , , , , and . ESSDERC, page 364-367. IEEE, (2022)4-Terminal Ferroelectric Schottky Barrier Field Effect Transistors as Artificial Synapses., , , , and . ESSDERC, page 291-294. IEEE, (2021)Manipulating InAs nanowires with submicrometer precision, , , , , , , , , and 1 other author(s). Review of Scientific Instruments, 82 (11): - (2011)Tuning the Dirac point to the Fermi level in the ternary topological insulator (Bi1−xSbx)2Te3, , , , , , , , , and 2 other author(s). Applied Physics Letters, 107 (25): 251603 (2015)Realization of a vertical topological p-n junction in epitaxial Sb2Te3/Bi2Te3 heterostructures, , , , , , , , , and 10 other author(s). Nat Commun, (November 2015)