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High performance binary neural networks on the Xeon+FPGA™ platform.

D. Moss, E. Nurvitadhi, J. Sim, A. Mishra, D. Marr, S. Subhaschandra, and P. Leong. FPL, page 1-4. IEEE, (2017)

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Evaluating The Highly-Pipelined Intel Stratix 10 FPGA Architecture Using Open-Source Benchmarks.T. Tan, E. Nurvitadhi, D. Shih, and D. Chiou. FPT, page 206-213. IEEE, (2018)Design, implementation, and verification of active cache emulator (ACE).J. Hong, E. Nurvitadhi, and S. Lu. FPGA, page 63-72. ACM, (2006)Artisan: a Meta-Programming Approach For Codifying Optimisation Strategies.J. Vandebon, J. Coutinho, W. Luk, E. Nurvitadhi, and T. Todman. FCCM, page 177-185. IEEE, (2020)Fast hierarchical implementation of sequential tree-reweighted belief propagation for probabilistic inference.S. Hurkat, J. Choi, E. Nurvitadhi, J. Martínez, and R. Rutenbar. FPL, page 1-8. IEEE, (2015)Programmable Automotive Headlights.R. Tamburo, E. Nurvitadhi, A. Chugh, M. Chen, A. Rowe, T. Kanade, and S. Narasimhan. ECCV (4), volume 8692 of Lecture Notes in Computer Science, page 750-765. Springer, (2014)Exploration of Low Numeric Precision Deep Learning Inference Using Intel® FPGAs: (Abstract Only).P. Colangelo, N. Nasiri, E. Nurvitadhi, A. Mishra, M. Margala, and K. Nealis. FPGA, page 294. ACM, (2018)HPVM2FPGA: Enabling True Hardware-Agnostic FPGA Programming.A. Ejjeh, L. Medvinsky, A. Councilman, H. Nehra, S. Sharma, V. Adve, L. Nardi, E. Nurvitadhi, and R. Rutenbar. ASAP, page 1-10. IEEE, (2022)Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs.A. Boutros, E. Nurvitadhi, R. Ma, S. Gribok, Z. Zhao, J. Hoe, V. Betz, and M. Langhammer. FPT, page 10-19. IEEE, (2020)A Study of Pointer-Chasing Performance on Shared-Memory Processor-FPGA Systems.G. Weisz, J. Melber, Y. Wang, K. Fleming, E. Nurvitadhi, and J. Hoe. FPGA, page 264-273. ACM, (2016)A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.D. Moss, K. Srivatsan, E. Nurvitadhi, P. Ratuszniak, C. Johnson, J. Sim, A. Mishra, D. Marr, S. Subhaschandra, and P. Leong. FPGA, page 107-116. ACM, (2018)

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Disambiguation of "Nurvitadhi, Eriko"

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High performance binary neural networks on the Xeon+FPGA™ platform.

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Disambiguation of "Nurvitadhi, Eriko"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML High performance binary neural networks on the Xeon+FPGA™ platform.

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High performance binary neural networks on the Xeon+FPGA™ platform.