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Fault Tolerance Properties of Systems Generated with the Use of High-Level Synthesis., , and . EWDTS, page 1-7. IEEE, (2018)Comparison of FPNNs models approximation capabilities and FPGA resources utilization., , and . ICCP, page 125-132. IEEE, (2017)HLS-based fault tolerance approach for SRAM-based FPGAs., , , and . FPT, page 301-302. IEEE, (2016)Redundant data types and operations in HLS and their use for a robot controller unit fault tolerance evaluation., , and . EWDTS, page 1-6. IEEE Computer Society, (2017)Verification of Robot Controller for Evaluating Impacts of Faults in Electro-Mechanical Systems., , , and . DSD, page 487-494. IEEE Computer Society, (2016)FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant System Design Automation., , , , and . DSD, page 244-251. IEEE Computer Society, (2018)Triple modular redundancy used in field programmable neural networks., , and . EWDTS, page 1-6. IEEE Computer Society, (2017)Data types and operations modifications: A practical approach to fault tolerance in HLS., , , and . EWDTS, page 1-6. IEEE Computer Society, (2017)Testing Embedded Software Through Fault Injection: Case Study on Smart Lock., , , , , and . LATS, page 1-6. IEEE, (2021)Functional verification as a tool for monitoring impact of faults in SRAM-based FPGAs., , , and . FPT, page 293-294. IEEE, (2016)