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Disambiguation of "Anders, Mark A."

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A 435MHz, 2.5Mbps/W Side-Channel-Attack Resistant Crypto-Processor for Secure RSA-4K Public-Key Encryption in 14nm CMOS.

, , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)

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Mark A Nusselein

Mark A Awabdy

Mark A Nusselein

Mark Yampolsky

Maßnahmen zur Sicherung von E2E-QoS bei verketteten Diensten. Uni München, (2009)

Mark Schütte

Crf2 - ein neues Antigen von Aspergillus fumigatus. TU Braunschweig, (2009)
 

Other publications of authors with the same name

Bias temperature instabilities in 4H SiC metal oxide semiconductor field effect transistors: Insight provided by electrically detected magnetic resonance., , , and . Microelectron. Reliab., (2018)25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range., , , , , , , , , and 4 other author(s). ISSCC, page 396-398. IEEE, (2020)A 320mV 56μW 411GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65nm CMOS., , , , , , and . ISSCC, page 316-317. IEEE, (2008)A 4.1Tb/s bisection-bandwidth 560Gb/s/W streaming circuit-switched 8×8 mesh network-on-chip in 45nm CMOS., , , , , , , and . ISSCC, page 110-111. IEEE, (2010)A 2.05GVertices/s 151mW lighting accelerator for 3D graphics vertex and pixel shading in 32nm CMOS., , , , , , , and . ISSCC, page 184-186. IEEE, (2012)A 280mV-to-1.1V 256b reconfigurable SIMD vector permutation engine with 2-dimensional shuffle in 22nm CMOS., , , , , , and . ISSCC, page 178-180. IEEE, (2012)High-performance energy-efficient NoC fabrics: Evolution and future challenges.. NOCS, page i. IEEE, (2014)250mV-950mV 1.1Tbps/W double-affine mapped Sbox based composite-field SMS4 encrypt/decrypt accelerator in 14nm tri-gate CMOS., , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)An All-Digital Unified Static/Dynamic Entropy Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction for Secure Privacy-Preserving Mutual Authentication in IoT Mote Platforms., , , , , , , , and . VLSI Circuits, page 169-170. IEEE, (2018)A Ray-Casting Accelerator in 10nm CMOS for Efficient 3D Scene Reconstruction in Edge Robotics and Augmented Reality Applications., , , , , , , , , and 4 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)