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Disambiguation of "Kanellopoulos, Konstantinos"

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SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems.

, , , , , , , , , , , , , , , , and . CoRR, (2021)

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Antonios Kanellopoulos

Yiannis Kanellopoulos

Charalambos Konstantin Kanellopoulos

Adriani Ruth Friederike Kanellopoulos

Konstantinos Spyridakis

 

Other publications of authors with the same name

Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources., , , , , , , and . MICRO, page 1178-1195. ACM, (2023)MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations., , , , , , , and . ACM Trans. Archit. Code Optim., 19 (2): 26:1-26:29 (2022)SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems., , , , , , , , , and 7 other author(s). CoRR, (2021)Utopia: Efficient Address Translation using Hybrid Virtual-to-Physical Address Mapping., , , , , , , , and . CoRR, (2022)CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost., , , , , , , and . HPCA, page 593-612. IEEE, (2024)SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations., , , , , , , , and . CoRR, (2019)PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques., , , , , , and . ISVLSI, page 267-272. IEEE, (2022)ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems., , , , , , , , , and . CoRR, (2022)Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings., , , , , , , , , and 1 other author(s). MICRO, page 1196-1212. ACM, (2023)SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems., , , , , , , , , and 9 other author(s). MICRO, page 282-297. ACM, (2021)