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Disambiguation of "Ravikumar, C. P."

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Efficient Delay Test Generation for Modular Circuits.

, , and . Great Lakes Symposium on VLSI, page 220-. IEEE Computer Society, (1996)

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Guido C C Clinckspoor

Thomas C C Knöbig

Ullrich C C Jagstaidt

Guido C C Clinckspoor

Thomas C C Gartenmann

 

Other publications of authors with the same name

Star-Graph based multistage interconnection network for ATM switch fabric., and . SPDP, page 444-451. IEEE Computer Society, (1994)Design Issues in Synthesis of Reusable Cores., and . Great Lakes Symposium on VLSI, page 144-. IEEE Computer Society, (1999)Efficient Delay Test Generation for Modular Circuits., , and . Great Lakes Symposium on VLSI, page 220-. IEEE Computer Society, (1996)Glitch-Aware Pattern Generation and Optimization Framework for Power-Safe Scan Test., , and . VTS, page 167-172. IEEE Computer Society, (2007)Efficient algorithms for delay-bounded minimum cost path problem in communication networks., , and . HiPC, page 141-146. IEEE Computer Society, (1998)Genetic Algorithms for Scan Path Design., and . VLSI Design, page 118-121. IEEE Computer Society, (1996)A Novel BIST Architecture With Built-in Self Check., , and . VLSI Design, page 57-60. IEEE Computer Society, (1996)On-Chip Signature Checking for Embedded Memories., , and . VLSI Design, page 558-563. IEEE Computer Society, (1998)Improvement of ASIC Design Processes., , and . ASP-DAC/VLSI Design, page 105-. IEEE Computer Society, (2002)Incomplete Star Graph: An Economical Fault-tolerant Interconnection Network., , and . ICPP (1), page 83-90. CRC Press, (1993)