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Disambiguation of "Pellerano, Stefano"

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A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS.

, , , , , , , , , , , and . ISSCC, page 168-170. IEEE, (2012)

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Fabrizio Queirolo Pellerano

Stefano Meini

Stefano Cracolici

Stefano Carignano

Stefano Terzo

 

Other publications of authors with the same name

A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS., , and . IEEE J. Solid State Circuits, 43 (7): 1542-1552 (2008)Fully-integrated frequency synthesizers for multi-standard WLAN applications.. Polytechnic University of Milan, Italy, (2004)A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution., , , , , , and . ESSCIRC, page 98-101. IEEE, (2008)A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS., , , , , , , , , and 1 other author(s). ISSCC, page 1420-1429. IEEE, (2006)22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input Tracking., , , , , , , and . ISSCC, page 392-394. IEEE, (2024)MIMO techniques for high data rate radio communications., , and . CICC, page 141-148. IEEE, (2008)19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers., , , , , , , , , and 14 other author(s). ISSCC, page 304-306. IEEE, (2020)A CMOS Wideband Current-Mode Digital Polar Power Amplifier With Built-In AM-PM Distortion Self-Compensation., , , , and . IEEE J. Solid State Circuits, 53 (2): 340-356 (2018)A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS., , , , , , , , , and 5 other author(s). VLSIC, page 76-77. IEEE, (2012)F3: Radio architectures and circuits towards 5G., , , , , and . ISSCC, page 498-501. IEEE, (2016)