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Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network., , , , , и . DATE, стр. 1463-1468. IEEE, (2019)An Efficient FPGA Implementation of Orthogonal Matching Pursuit With Square-Root-Free QR Decomposition., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 611-623 (2019)A yield-enhanced global optimization methodology for analog circuit based on extreme value theory., , , , , и . Sci. China Inf. Sci., 59 (8): 082401:1-082401:16 (2016)C-YES: An Efficient Parametric Yield Estimation Approach for Analog and Mixed-Signal Circuits Based on Multicorner-Multiperformance Correlations., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (6): 899-912 (2017)Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (7): 1476-1488 (2021)An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble., , , , и . CoRR, (2021)A novel wavelet method for noise analysis of nonlinear circuits., , , , и . ASP-DAC, стр. 471-476. ACM Press, (2005)Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit., , , , , , и . ISCAS, стр. 249-252. IEEE, (2016)A parallel sparse linear system solver for large-scale circuit simulation based on Schur Complement., , , , и . ASICON, стр. 1-4. IEEE, (2013)Wavelet method for high-speed clock tree simulation., , , и . ISCAS (1), стр. 177-180. IEEE, (2002)