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Disambiguation of "Liscidini, Antonio"

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A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers.

, , , and . ISSCC, page 348-350. IEEE, (2012)

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Antonio Pinto

Antonio Accardi

Antonio Bergua

Antonio Dell'Aquila

Antonio Wünsch

 

Other publications of authors with the same name

F4: Wireless low-power transceivers for local and wide-area networks., , , , and . ISSCC, page 509-511. IEEE, (2017)Two-Dimensions Vernier Time-to-Digital Converter., , and . IEEE J. Solid State Circuits, 45 (8): 1504-1512 (2010)4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOI., , and . ISSCC, page 84-86. IEEE, (2024)DC-Coupled Biasing Technique for Quantized-Analog Amplifiers., and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (9): 4146-4150 (September 2024)A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers., , , and . IEEE J. Solid State Circuits, 53 (3): 681-691 (2018)A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier., , , and . IEEE J. Solid State Circuits, 41 (4): 981-989 (2006)20.9 A 1.92mW filtering transimpedance amplifier for RF current passive mixers., and . ISSCC, page 358-359. IEEE, (2016)Low-Power QPSK Transmitter Based on an Injection-Locked Power Amplifier., , and . ESSCIRC, page 134-137. IEEE, (2018)A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance., , and . CICC, page 1-4. IEEE, (2018)A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO., , , , , and . ISSCC, page 1892-1901. IEEE, (2006)