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Disambiguation of "Lim, Sung Kyu"

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FastTuner: Transferable Physical Design Parameter Optimization using Fast Reinforcement Learning.

, , , and . ISPD, page 93-101. ACM, (2024)

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Sung-Ki Lim

Yong-Sung Lim

Han-Sung Lim

Sung-Kyu Hong

Sung-Yeun Lim

 

Other publications of authors with the same name

Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling., , and . DAC, page 28:1-28:6. ACM, (2014)Multi-layer floorplanning for reliable system-on-package., , , and . ISCAS (5), page 69-72. IEEE, (2004)On Legalization of Die Bonding Bumps and Pads for 3D ICs., , , , and . ISPD, page 62-70. ACM, (2023)DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning., , , and . ISPD, page 141-148. ACM, (2023)Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs., , , , and . ISPD, page 39-46. ACM, (2021)Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (3): 410-423 (2022)Profile-Driven Instruction Mapping for Dataflow Architectures., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (12): 3017-3025 (2006)Fast bidirectional shortest path on GPU., , , , , and . IEICE Electron. Express, 13 (6): 20160036 (2016)QCA channel routing with wire crossing minimization., and . ACM Great Lakes Symposium on VLSI, page 217-220. ACM, (2005)Cascade2D: A design-aware partitioning approach to monolithic 3D IC with 2D commercial tools., , , , , , and . ICCAD, page 130. ACM, (2016)