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Disambiguation of "Gören, Sezer"

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Reconfigurable hardware-based genome aligner using quality scores.

, , , and . SIU, page 1-4. IEEE, (2013)

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Gören Burghardt

Adil Gören

Frank Gören

Gideon Goren

Ömer Sezer

 

Other publications of authors with the same name

Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection., , and . J. Electron. Test., 31 (5-6): 525-536 (2015)Erratum to: Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection., , and . J. Electron. Test., 32 (1): 105-106 (2016)Design Principles for Interoperability of Private Blockchains., and . DBB, volume 541 of Lecture Notes in Networks and Systems, page 15-26. Springer, (2022)Programmable Hardware Based Short Read Aligner Using Phred Quality Scores., , , and . SocialCom, page 864-867. IEEE Computer Society, (2013)On-Street Parking Spot Detection for Smart Cities., , , and . ISC2, page 292-295. IEEE, (2019)Checking sequence generation for asynchronous sequential elements., and . ITC, page 406-413. IEEE Computer Society, (1999)Tools and Techniques for Implementation of Real-time Video Processing Algorithms., , , , , , , , and . J. Signal Process. Syst., 91 (1): 93-113 (2019)Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration., , , , , and . Comput. Electr. Eng., 39 (2): 386-397 (2013)Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension., , , , , , , , and . EWDTS, page 1-5. IEEE, (2019)Generating fast logic circuits for m-select n-port Round Robin Arbitration., , and . VLSI-SoC, page 260-265. IEEE, (2013)