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Performance Evaluation of Pipelined Communication Combined with Computation in OpenCL Programming on FPGA.

, , , , , and . IPDPS Workshops, page 450-459. IEEE, (2020)

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ArchHDL: A Novel Hardware RTL Modeling and High-Speed Simulation Environment., , and . IEICE Trans. Inf. Syst., 101-D (2): 344-353 (2018)Multi-Hybrid Accelerated Simulation by GPU and FPGA on Radiative Transfer Simulation in Astrophysics., , , , , , and . J. Inf. Process., (2020)CHARM-SYCL & IRIS: A Tool Chain for Performance Portability on Extremely Heterogeneous Systems., , , , , , , , and . e-Science, page 1-10. IEEE, (2024)FACE: Fast and Customizable Sorting Accelerator for Heterogeneous Many-core Systems., and . MCSoC, page 49-56. IEEE Computer Society, (2015)Performance Evaluation of Pipelined Communication Combined with Computation in OpenCL Programming on FPGA., , , , , and . IPDPS Workshops, page 450-459. IEEE, (2020)HBM2 Memory System for HPC Applications on an FPGA., , , and . CLUSTER, page 783-786. IEEE, (2021)GPU-FPGA-accelerated Radiative Transfer Simulation with Inter-FPGA Communication., , , , , , and . HPC Asia, page 117-125. ACM, (2023)Accelerating Space Radiative Transfer on FPGA using OpenCL., , , , , , , and . HEART, page 6:1-6:7. ACM, (2018)Toward OpenACC-enabled GPU-FPGA Accelerated Computing., , , , , and . CLUSTER, page 422-423. IEEE, (2020)Performance improvement by enhancing spatial parallelism on FPGA for HPC applications., , , , , and . CLUSTER Workshops, page 58-59. IEEE, (2023)