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Function inlining and loop unrolling for loop acceleration in reconfigurable processors.

, , , and . CASES, page 101-110. ACM, (2012)

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Retargetable automatic generation of compound instructions for CGRA based reconfigurable processor applications., , , and . CASES, page 4:1-4:9. ACM, (2014)Accelerator for Computing on Encrypted Data., , , , , and . IACR Cryptol. ePrint Arch., (2021)Area-Efficient Number Theoretic Transform Architecture for Homomorphic Encryption., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (3): 1270-1283 (March 2023)Privacy-Preserving Machine Learning with Fully Homomorphic Encryption for Deep Neural Network., , , , , , , , , and 1 other author(s). CoRR, (2021)Efficient FHEW Bootstrapping with Small Evaluation Keys, and Applications to Threshold Homomorphic Encryption., , , , , , and . EUROCRYPT (3), volume 14006 of Lecture Notes in Computer Science, page 227-256. Springer, (2023)An OpenCL optimizing compiler for reconfigurable processors., , , , , , and . FPT, page 184-191. IEEE, (2013)Nop compression scheme for high speed DSPs based on VLIW architecture., , , , , , and . ICCE, page 304-305. IEEE, (2014)SCC based modulo scheduling for coarse-grained reconfigurable processors., , , and . FPT, page 321-328. IEEE, (2012)Function inlining and loop unrolling for loop acceleration in reconfigurable processors., , , and . CASES, page 101-110. ACM, (2012)