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A framework to accelerate sequential programs on homogeneous multicores., , , и . VLSI-SoC, стр. 344-347. IEEE, (2013)A model to exploit power-performance efficiency in superscalar processors via structure resizing., и . ACM Great Lakes Symposium on VLSI, стр. 215-220. ACM, (2010)Timing-based side-channel attack and mitigation on PCIe connected distributed embedded systems., , и . HPEC, стр. 1-7. IEEE, (2021)Seeds of SEED: Characterizing Enclave-level Parallelism in Secure Multicore Processors., и . SEED, стр. 203-209. IEEE, (2021)ConNOC: A Practical Timing Channel Attack on Network-on-chip Hardware in a Multicore Processor., и . HOST, стр. 192-202. IEEE, (2021)Characterization of mitigation schemes against timing-based side-channel attacks on PCIe hardware., , и . ISQED, стр. 1-6. IEEE, (2022)Time-Predictable Computer Architecture for Cyber-Physical Systems: Digital Emulation of Power Electronics Systems., , , , , и . RTSS, стр. 305-316. IEEE Computer Society, (2011)Predictive Thermal Management for Chip Multiprocessors Using Co-designed Virtual Machines., и . HiPEAC, том 5409 из Lecture Notes in Computer Science, стр. 293-307. Springer, (2009)A self-adaptive system architecture to address transistor aging., и . DATE, стр. 81-86. IEEE, (2009)POSTER: Exploiting Multi-Level Task Dependencies to Prune Redundant Work in Relax-Ordered Task-Parallel Algorithms., , , и . PACT, стр. 495-496. IEEE, (2019)