( en | de | ru )

 

Disambiguation of "Jayakumar, Nikhil"

Author of the publication

copydeleteadd this publication to your clipboard
ISPD 2013 expert designer/user session (eds).

, , , , , , , and . ISPD, page 137. ACM, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Nikhil Sasidharan

Tammana Jayakumar

Nikhil Ratanje

Nikhil Jethava

Nikhil Karamchandani

 

Other publications of authors with the same name

An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs., , and . ISLPED, page 111-114. ACM, (2005)High-throughput VLSI implementations of iterative decoders and related code construction problems., , , and . GLOBECOM, page 361-365. IEEE, (2004)An Automated Approach for Minimum Jitter Buffered H-Tree Construction., , , , and . VLSI Design, page 76-81. IEEE Computer Society, (2011)A low-jitter phase-locked resonant clock generation and distribution scheme., , , , and . ICCD, page 487-490. IEEE Computer Society, (2013)A design flow to optimize circuit delay by using standard cells and PLAs., , , , , and . ACM Great Lakes Symposium on VLSI, page 217-222. ACM, (2006)Dos and don'ts of CTL state coverage estimation., , and . DAC, page 292-295. ACM, (2003)A design approach for radiation-hard digital electronics., , , and . DAC, page 773-778. ACM, (2006)An ASIC design methodology with predictably low leakage, using leakage-immune standard cells., and . ISLPED, page 128-133. ACM, (2003)A High-Speed Fully-Programmable VLSI Decoder for Regular LDPC Codes., , , , , and . ICASSP (3), page 972-975. IEEE, (2006)A PLA based asynchronous micropipelining approach for subthreshold circuit design., , , and . DAC, page 419-424. ACM, (2006)