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A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling., , , , , , , , и . IEEE J. Solid State Circuits, 53 (4): 1139-1148 (2018)A 14mW Multi-bit ΔΣ Modulator with 82dB SNR and 86dB DR for ADSL2+., и . ISSCC, стр. 161-170. IEEE, (2006)A 1.2V, 3.5µW, 20MS/s, 8-bit comparator with dynamic-biasing preamplifier., и . ISCAS, IEEE, (2006)A 0.028% THD+N, 91% power-efficiency, 3-level PWM Class-D amplifier with a true differential front-end., , , , , , , , , и . ISSCC, стр. 96-98. IEEE, (2012)Mixed-Order Sturdy MASH Delta-Sigma Modulator., , , и . ISCAS, стр. 257-260. IEEE, (2007)A continuous-time input pipeline ADC with inherent anti-alias filtering., , , , и . CICC, стр. 275-278. IEEE, (2009)A 2.4ps resolution 2.1mW second-order noise-shaped time-to-digital converter with 3.2ns range in 1MHz bandwidth., , , и . CICC, стр. 1-4. IEEE, (2010)A 5.4mW 2-Channel Time-Interleaved Multi-bit ΔΣ Modulator with 80dB SNR and 85dB DR for ADSL., , и . ISSCC, стр. 171-180. IEEE, (2006)A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement., и . ISCAS, стр. 733-736. IEEE, (2007)A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS., , , , и . CICC, стр. 1-4. IEEE, (2009)