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Другие публикации лиц с тем же именем

Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure., , , и . PATMOS, стр. 237-242. IEEE, (2018)Microarchitectural-level statistical timing models for near-threshold circuit design., , и . ASP-DAC, стр. 87-93. IEEE, (2015)An energy-efficient on-chip memory structure for variability-aware near-threshold operation., , и . ISQED, стр. 23-28. IEEE, (2015)DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification., , , и . ASP-DAC, стр. 43-49. IEEE, (2022)Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics., , , , , и . DAC, стр. 139-144. IEEE, (2021)Approximation-Based Implementation for a Minimum Energy Point Tracking Algorithm over a Wide Operating Performance Region., , и . LASCAS, стр. 1-4. IEEE, (2022)A Triturated Sensing System., , , , , , , и . ISSCC, стр. 216-217. IEEE, (2023)A Self-Programming PUF Harvesting the High-Energy Plasma During Fabrication., , , , и . ISSCC, стр. 218-219. IEEE, (2023)Variability- and correlation-aware logical effort for near-threshold circuit design., , и . ISQED, стр. 18-23. IEEE, (2016)Fully digital on-chip memory using minimum height standard cells for near-threshold voltage computing., , и . PATMOS, стр. 44-49. IEEE, (2016)