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The Forward Slice Core: A High-Performance, Yet Low-Complexity Microarchitecture., , , and . ACM Trans. Archit. Code Optim., 19 (2): 17:1-17:25 (2022)AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors., , and . MICRO, page 125-136. IEEE Computer Society, (2010)Statistically rigorous java performance evaluation., , and . OOPSLA, page 57-76. ACM, (2007)Sniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation., , and . SC, page 52:1-52:12. ACM, (2011)Exploiting program phase behavior for energy reduction on multi-configuration processors., , and . J. Syst. Archit., 53 (8): 489-500 (2007)Low-level behavioral analysis of the JVT/AVC decoder., , , , and . VCIP, volume 5308 of SPIE Proceedings, SPIE, (2004)Cole: compiler optimization level exploration., and . CGO, page 165-174. ACM, (2008)Chrysso: an integrated power manager for constrained many-core processors., , , , , , , and . Conf. Computing Frontiers, page 19:1-19:8. ACM, (2015)Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor., , , , , and . ROSS@ICS, page 7:1-7:7. ACM, (2014)Accurate memory data flow modeling in statistical simulation., , and . ICS, page 87-96. ACM, (2006)