Author of the publication

Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic Encryption.

, , , , and . ARITH, page 1-8. IEEE, (2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Ultra Low-Power implementation of ECC on the ARM Cortex-M0+., , , and . DAC, page 112:1-112:6. ACM, (2014)Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment., , , , , , and . CHES, volume 3659 of Lecture Notes in Computer Science, page 354-365. Springer, (2005)Low-cost untraceable authentication protocols for RFID., , , and . WISEC, page 55-64. ACM, (2010)FPT: A Fixed-Point Accelerator for Torus Fully Homomorphic Encryption., , , and . CCS, page 741-755. ACM, (2023)Mining CryptoNight-Haven on the Varium C1100 Blockchain Accelerator Card., , , and . FPL, page 452-453. IEEE, (2022)The Impact of Error Dependencies on Ring/Mod-LWE/LWR Based Schemes., , and . PQCrypto, volume 11505 of Lecture Notes in Computer Science, page 103-115. Springer, (2019)Partition vs. Comparison Side-Channel Distinguishers: An Empirical Evaluation of Statistical Tests for Univariate Side-Channel Attacks against Two Unprotected CMOS Devices., , and . ICISC, volume 5461 of Lecture Notes in Computer Science, page 253-267. Springer, (2008)Secure Logic Synthesis., and . FPL, volume 3203 of Lecture Notes in Computer Science, page 1052-1056. Springer, (2004)24.1 Circuit challenges from cryptography., , , and . ISSCC, page 1-2. IEEE, (2015)A fast dual-field modular arithmetic logic unit and its hardware implementation., , and . ISCAS, IEEE, (2006)