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Efficient Algorithmic Circuit Verification Using Indexed BDDs.

, , , , and . FTCS, page 266-275. IEEE Computer Society, (1994)

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Efficient Algorithmic Circuit Verification Using Indexed BDDs., , , , and . FTCS, page 266-275. IEEE Computer Society, (1994)Design rewiring based on diagnosis techniques., , and . ASP-DAC, page 479-484. ACM, (2001)Design Optimization Based on Diagnosis Techniques., , and . LATW, page 244-249. IEEE, (2000)ATPG Driven Logic Synthesis for Delay and Power Minimization., , and . LATW, page 96-99. IEEE, (2001)A quick and inexpensive method to identify false critical paths using ATPG techniques: an experiment with a PowerPCTM microprocessor., , and . CICC, page 71-74. IEEE, (2000)Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification., , , and . IEEE Des. Test, 34 (5): 5-6 (2017)Verification and Validation of Complex Digital Systems: An Industrial Perspective., and . ISQED, page 11-12. IEEE Computer Society, (2001)Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability., , , , and . ISQED, page 470-475. IEEE Computer Society, (2008)A New Validation Methodology Combining Test and Formal Verification for PowerPCTM Microprocessor Arrays., and . ITC, page 954-963. IEEE Computer Society, (1997)Establishing latch correspondence for embedded circuits of PowerPC microprocessors., , , , and . HLDVT, page 37-44. IEEE Computer Society, (2005)