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Disambiguation of "Cabello, Diego"

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A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation.

, , , , and . ICECS 2022, page 1-4. IEEE, (2022)

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Alexander Diego

Jesús Diego Linares

Diego Feijóo

Diego Heredia

Diego Tonolla

 

Other publications of authors with the same name

Optimization Neural Networks for Image Segmentation., , and . IWANN, volume 930 of Lecture Notes in Computer Science, page 860-867. Springer, (1995)An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 844-848 (2022)In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors., , , and . Int. J. Circuit Theory Appl., 46 (9): 1631-1647 (2018)Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting., , , and . Int. J. Circuit Theory Appl., 44 (10): 1874-1894 (2016)CMOS-3D Smart Imager Architectures for Feature Detection., , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (4): 723-736 (2012)A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation., , , , and . ICECS 2022, page 1-4. IEEE, (2022)An analog CMOS realisation of a reconfigurable discrete-time cellular neural network., , and . ICECS, page 285-288. IEEE, (1998)Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm2 Subthreshold Voltage Reference for Implantable Devices., , , , and . ICECS, page 386-389. IEEE, (2019)Voltage boosters for on-chip solar cells on focal-plane processors., , , , , and . ICECS, page 393-396. IEEE, (2013)Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm., , , , , , and . FPL, page 1-4. IEEE, (2014)