( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture.

, , , и . SBCCI, стр. 1-6. IEEE, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Fábio Favarim

Fábio Alexandrini

Fábio Walter

Carlos Ramos Cuevas

On convex subcomplexes of spherical buildings and Tits' center conjecture. Uni München, (2009)

Livi Gunkel

 

Другие публикации лиц с тем же именем

Power-Throughput Trade-off Analysis for a Novel Multi-Boolean AV1 Arithmetic Encoder Design., , и . PCS, стр. 25-29. IEEE, (2022)High-Throughput Binary Arithmetic Encoder using Multiple-Bypass Bins Processing for HEVC CABAC., , , и . ISCAS, стр. 1-5. IEEE, (2018)AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture., , , и . SBCCI, стр. 1-6. IEEE, (2023)Area and Power Efficient 8K Real-Time Design for AV1 Arithmetic Decoding., , , и . PCS, стр. 7-11. IEEE, (2022)Low-power HEVC binarizer architecture for the CABAC block targeting UHD video processing., , , , и . SBCCI, стр. 30-35. ACM, (2017)Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture., , , и . SBCCI, стр. 47-52. ACM, (2017)A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding., , , , и . ICECS, стр. 587-590. IEEE, (2010)Statistical Analysis of VVC Residual and Entropy Coding aiming Efficient Hardware Design., , , , , и . LASCAS, стр. 1-5. IEEE, (2024)Analysis of AV1 Arithmetic Decoder Design Space with a Novel Multi-Boolean Approach., , , и . LASCAS, стр. 1-4. IEEE, (2023)Low-power hardware design for the HEVC Binary Arithmetic Encoder targeting 8K videos., , , , и . SBCCI, стр. 1-6. IEEE, (2016)