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Disambiguation of "Kondo, Masaaki"

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Energy-efficient dynamic instruction scheduling logic through instruction grouping.

, , and . ISLPED, page 43-48. ACM, (2006)

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Masaaki Minakawa

Masaaki Hayashida

Masaaki Tsukamoto

Katsuhiko Kondo

Kanjior Kondo

 

Other publications of authors with the same name

The Effectiveness of Low-Precision Floating Arithmetic on Numerical Codes: A Case Study on Power Consumption., , , , and . HPC Asia, page 199-206. ACM, (2020)QULATIS: A Quantum Error Correction Methodology toward Lattice Surgery., , , , and . HPCA, page 274-287. IEEE, (2022)Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression., , , , , , , , , and 2 other author(s). VLSI Design, page 381-386. IEEE Computer Society, (2009)Power reduction of chip multi-processors using shared resource control cooperating with DVFS., , , and . ICCD, page 615-622. IEEE, (2007)Adaptive power gating for function units in a microprocessor., , , , , , , , and . ISQED, page 29-37. IEEE, (2010)Energy-efficient dynamic instruction scheduling logic through instruction grouping., , and . ISLPED, page 43-48. ACM, (2006)Skip2-LoRA: A Lightweight On-device DNN Fine-tuning Method for Low-cost Edge Devices., , , and . CoRR, (2024)A Prototype System for Many-Core Architecture SMYLEref with FPGA Evaluation Boards., , , and . IEICE Trans. Inf. Syst., 96-D (8): 1645-1653 (2013)OS-ELM-FPGA: An FPGA-Based Online Sequential Unsupervised Anomaly Detector., , and . Euro-Par Workshops, volume 11339 of Lecture Notes in Computer Science, page 518-529. Springer, (2018)Design Method of High Performance and Low Power Functional Units Considering Delay Variations., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (12): 3519-3528 (2006)