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The Effectiveness of Low-Precision Floating Arithmetic on Numerical Codes: A Case Study on Power Consumption., , , , and . HPC Asia, page 199-206. ACM, (2020)Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression., , , , , , , , , and 2 other author(s). VLSI Design, page 381-386. IEEE Computer Society, (2009)Power reduction of chip multi-processors using shared resource control cooperating with DVFS., , , and . ICCD, page 615-622. IEEE, (2007)Adaptive power gating for function units in a microprocessor., , , , , , , , and . ISQED, page 29-37. IEEE, (2010)QULATIS: A Quantum Error Correction Methodology toward Lattice Surgery., , , , and . HPCA, page 274-287. IEEE, (2022)Energy-efficient dynamic instruction scheduling logic through instruction grouping., , and . ISLPED, page 43-48. ACM, (2006)Skip2-LoRA: A Lightweight On-device DNN Fine-tuning Method for Low-cost Edge Devices., , , and . CoRR, (2024)An Adaptive Abnormal Behavior Detection using Online Sequential Learning., , , and . CSE/EUC, page 436-440. IEEE, (2019)A flexible hardware barrier mechanism for many-core processors., , , , and . ASP-DAC, page 61-68. IEEE, (2015)Exploiting Data Parallelism in Graph-Based Simultaneous Localization and Mapping: A Case Study with GPU Accelerations., , and . HPC Asia, page 126-139. ACM, (2023)