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Disambiguation of "Soga, Takashi"

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Effects of Using a Memory Stalled Core for Handling MPI Communication Overlapping in the SOR Solver on SX-ACE and SX-Aurora TSUBASA.

, , , , , , and . Supercomput. Front. Innov., 7 (4): 4-15 (2020)

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Takashi Seki

Marion Soganci

Takashi Iwata

Takashi Numaguchi

Takashi Tsuno

 

Other publications of authors with the same name

I/O Performance Evaluation of a Memory-Saving DNS Code on SX-Aurora TSUBASA., , , , , , , , and . IPDPS Workshops, page 692-696. IEEE, (2023)First Experiences with NEC SX-9., , , , , , and . High Performance Computing on Vector Systems, Springer, (2008)Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications., , , , and . ISPA, volume 4330 of Lecture Notes in Computer Science, page 845-858. Springer, (2006)Performance evaluation of NEC SX-9 using real science and engineering applications., , , , , , , and . SC, ACM, (2009)Effects of Using a Memory Stalled Core for Handling MPI Communication Overlapping in the SOR Solver on SX-ACE and SX-Aurora TSUBASA., , , , , , and . Supercomput. Front. Innov., 7 (4): 4-15 (2020)A shared cache for a chip multi vector processor., , , , , , and . MEDEA@PACT, page 24-29. ACM, (2008)The Mega-Pixel Digital Still Camera., and . PICS, page 62-63. IS&T - The Society for Imaging Science and Technology, (1998)Vectorization-Aware Loop Optimization with User-Defined Code Transformations., , , , , , and . CLUSTER, page 685-692. IEEE Computer Society, (2017)Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture., , , , , , and . ISPA, page 335-342. IEEE Computer Society, (2008)File I/O Cache Performance of Supercomputer Fugaku Using an Out-of-Core Direct Numerical Simulation Code of Turbulence., , , , , , , , , and . ICCS (6), volume 14837 of Lecture Notes in Computer Science, page 173-187. Springer, (2024)