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Disambiguation of "Stow, Dylan C."

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Power Profiling of Modern Die-Stacked Memory.

, , , , and . IEEE Comput. Archit. Lett., 18 (2): 132-135 (2019)

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Werner Stöwsand

Hartmut Stöwhas

Hans-Gerhard Stöwer

Judith Stowasser

Hans-Gerhard Stöwer

 

Other publications of authors with the same name

Investigation of Cost-Optimal Network-on-Chip for Passive and Active Interposer Systems., , and . SLIP, page 1-8. IEEE, (2019)Cost analysis and cost-driven IP reuse methodology for SoC design based on 2.5D/3D integration., , , , and . ICCAD, page 56. ACM, (2016)Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges., , , , , , and . ACM Great Lakes Symposium on VLSI, page 347-352. ACM, (2016)Cost-efficient 3D Integration to Hinder Reverse Engineering During and After Manufacturing., , , , and . AsianHOST, page 74-79. IEEE, (2018)Network-on-Chip Design Guidelines for Monolithic 3-D Integration., , and . IEEE Micro, 39 (6): 46-53 (2019)Power Profiling of Modern Die-Stacked Memory., , , , and . IEEE Comput. Archit. Lett., 18 (2): 132-135 (2019)Die Stacking Is Happening., , and . IEEE Micro, 38 (1): 22-28 (2018)Security Threats and Countermeasures in Three-Dimensional Integrated Circuits., , , , , and . ACM Great Lakes Symposium on VLSI, page 321-326. ACM, (2017)Cost-effective design of scalable high-performance systems using active and passive interposers., , , and . ICCAD, page 728-735. IEEE, (2017)Yield-driven minimum energy CMOS cell design., , , and . ACSCC, page 1010-1014. IEEE, (2012)