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NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator.

G. Du, Z. Yang, Z. Li, D. Zhang, Y. Yin, and Z. Lu. ICCD, page 173-176. IEEE, (2019)

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Zhang Zhang

Meng Zhang

Methods and implementations of road-network matchingM. Zhang. TU München, (2009)

Yue Zhang

Xianghui Zhang

Le Zhang

Other publications of authors with the same name

A Real-Time Effective Fusion-Based Image Defogging Architecture on FPGA.G. Du, J. Wu, H. Cao, K. Xing, Z. Li, D. Zhang, and X. Wang. ACM Trans. Multim. Comput. Commun. Appl., 17 (3): 93:1-93:21 (2021)Design and performance evaluation of a 2D-mesh Network on Chip prototype using FPGA.L. Geng, G. Du, D. Zhang, M. Gao, N. Hou, and Y. Song. APCCAS, page 1264-1267. IEEE, (2008)Design and Implementation of A High-speed Configurable 2D ML-CFAR Detector.X. Tao, D. Zhang, M. Wang, Y. Ma, and Y. Song. ASICON, page 1-4. IEEE, (2021)Performance analysis for matrix-multiplication based on an heterogeneous multi-core SoC.Y. Song, R. Jiao, D. Zhang, and D. Gao. ASICON, page 1-4. IEEE, (2015)Scalability Study on Mesh Based Network on Chip.G. Du, D. Zhang, Y. Song, M. Gao, L. Geng, and N. Hou. PACIIA (2), page 681-685. IEEE Computer Society, (2008)978-0-7695-3490-9.Efficient Softmax Hardware Architecture for Deep Neural Networks.G. Du, C. Tian, Z. Li, D. Zhang, Y. Yin, and Y. Ouyang. ACM Great Lakes Symposium on VLSI, page 75-80. ACM, (2019)VLSI Architecture of Video Post-Processing System for MPEG/H.26X.C. Qin, D. Zhang, G. Du, M. Gao, and Y. Song. NCM, page 1520-1525. IEEE Computer Society, (2009)Design and implementation of homogeneous multi-core system.X. Wang, D. Qu, Y. Song, and D. Zhang. ASICON, page 788-791. IEEE, (2017)Application-level pipelining on Hierarchical NoC.W. Yi, H. Pan, P. Pan, L. Li, M. Gao, N. Hou, G. Du, and D. Zhang. ISCAS, page 3873-3876. IEEE, (2010)A chain-multiplier for large scale matrix multiplication.C. Wei, Y. Song, and D. Zhang. ASICON, page 792-795. IEEE, (2017)

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Disambiguation of "Zhang, Duoli"

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NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator.

Please choose a person to relate this publication to

Zhang Zhang

Meng Zhang

Yue Zhang

Xianghui Zhang

Le Zhang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhang, Duoli"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator.

Please choose a person to relate this publication to

Zhang Zhang

Meng Zhang

Yue Zhang

Xianghui Zhang

Le Zhang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator.