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Improved Defect Detection and Classification Method for Advanced IC Nodes by Using Slicing Aided Hyper Inference with Refinement Strategy.

, , , , and . CoRR, (2023)

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A Reversible-Logic based Architecture for VGGNet., , , and . ICECS, page 1-4. IEEE, (2021)A Comparative Study of Deep-Learning Object Detectors for Semiconductor Defect Detection., , and . ICECS 2022, page 1-2. IEEE, (2022)An Efficient Embryonic Hardware Architecture based on Network-on-Chip., , , , and . MWSCAS, page 449-452. IEEE, (2021)Robust segmentation and accurate target definition for positron emission tomography images using Affinity Propagation., , , , , , , and . ISBI, page 1461-1464. IEEE, (2013)A Novel Reconfigurable Hardware Architecture of Neural Network., , , , and . MWSCAS, page 618-621. IEEE, (2019)An Efficient Reconfigurable Neural Network on Chip., , , , and . ICECS, page 1-4. IEEE, (2021)Architecture of A Novel Low-Cost Hardware Neural Network., , , , and . MWSCAS, page 1060-1063. IEEE, (2020)Fast deep pyramid DPM object detection with region proposal networks., , , and . ISSPIT, page 168-173. IEEE Computer Society, (2017)A Novel Design Reversible Logic Based Configurable Fault-Tolerant Embryonic Hardware., , , , and . ISCAS, page 1-5. IEEE, (2020)Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS., , , , , , and . CoRR, (2024)