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Disambiguation of "O'Mahony, Frank"

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A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS.

, , , , , , , , , and . ISSCC, page 402-403. IEEE, (2013)

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Thomas Gregor Frank

Systemische Inflammationsmarker und Koronarkalzifizierungen im Mehrzeilenspiral-Computertomographen bei Patienten mit Verdacht auf koronare Herzkrankheit. Uni Erlangen-Nürnberg, (2009)

Peter Franke

Designing embodied interactive software agents for e-learning: principles, components, and roles. Uni Marburg, (2008)

Frank Frank

Katrin Fränkel

Jörg Franke

 

Other publications of authors with the same name

Design considerations for low-power receiver front-end in high-speed data links., , , , and . CICC, page 1-8. IEEE, (2013)Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (8): 1818-1829 (2009)F6: Energy-efficient I/O design for next-generation systems., , , , , and . ISSCC, page 520-521. IEEE, (2014)10.5 A 5.9pJ/b 10Gb/s serial link with unequalized MM-CDR in 14nm tri-gate CMOS., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 2GHz-to-7.5GHz quadrature clock-generator using digital delay locked loops for multi-standard I/Os in 14nm CMOS., , , , and . VLSIC, page 1-2. IEEE, (2014)A 0.6 mW/Gb/s, 6.4-7.2 Gb/s Serial Link Receiver Using Local Injection-Locked Ring Oscillators in 90 nm CMOS., , , , and . IEEE J. Solid State Circuits, 45 (4): 899-908 (2010)An on-die all-digital power supply noise analyzer with enhanced spectrum measurements., , , and . ESSCIRC, page 251-254. IEEE, (2014)Varactor-based signal restoration for near-speed-of-light surfing global interconnect., , , , and . CICC, page 1-4. IEEE, (2010)A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS., , , , , , , , , and . ISSCC, page 402-403. IEEE, (2013)Session 6 overview: Ultra-high-speed wireline., , and . ISSCC, page 108-109. IEEE, (2017)