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Disambiguation of "Namiki, Mitaro"

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Delegation-Based MPI Communications for a Hybrid Parallel Computer with Many-Core Architecture.

, , , , , and . EuroMPI, volume 7490 of Lecture Notes in Computer Science, page 47-56. Springer, (2012)

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Other publications of authors with the same name

Dynamic Allocation of Physical Register Banks for an SMT Processor., , , , , , , and . PDPTA, page 317-323. CSREA Press, (2004)A Process and Thread Management of the Operating System "Future" for On Chip Multithreaded Architecture., , , , , , and . PDPTA, page 1669-1675. CSREA Press, (2003)A New Model of Reconfigurable Cache for an SMT Processor and its FPGA Implementation., , , , , , , and . PDPTA, page 447-453. CSREA Press, (2005)Programming in a mother tongue: philosophy, implementation, practice and effect., , , , , , and . COMPSAC, page 705-712. IEEE, (1991)TEE-KV: Secure Immutable Key-Value Store for Trusted Execution Environments., , , , and . SoCC, page 535. ACM, (2018)CS Unplugged Assisted by Digital Materials for Handicapped People at Schools., , , and . ISSEP, volume 7013 of Lecture Notes in Computer Science, page 82-93. Springer, (2011)End-to-End Delay Model for Remote Surveillance over Internet and Mobile Networks., and . ISPACS, page 226-230. IEEE, (2018)A design of hybrid operating system for a parallel computer with multi-core and many-core processors., , , , , , , , and . ROSS@ICS, page 9:1-9:8. ACM, (2012)M-KUBOS/PYNQ Cluster for multi-access edge computing., , , , , , and . CANDAR, page 95-101. IEEE, (2021)Adaptive power gating for function units in a microprocessor., , , , , , , , and . ISQED, page 29-37. IEEE, (2010)