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FPU Speedup Estimation for Task Placement Optimization on Asymmetric Multicore Designs., , , and . MCSoC, page 81-87. IEEE Computer Society, (2015)A small footprint interleaved multithreaded processor for embedded systems., , , , , , and . ICECS, page 685-690. IEEE, (2011)Hardware acceleration for Just-In-Time compilation on heterogeneous embedded systems., , and . ASAP, page 203-210. IEEE Computer Society, (2013)Hardware Acceleration of Red-Black Tree Management and Application to Just-In-Time Compilation., , and . J. Signal Process. Syst., 77 (1-2): 95-115 (2014)An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture., , , , and . DATE, page 531-534. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Nanocomputing Block based Multi-Context FPGA., , and . ERSA, page 297-298. CSREA Press, (2009)A unified methodology for a fast benchmarking of parallel architecture., , and . DATE, page 1-4. European Design and Automation Association, (2014)BLOB computing., , , and . Conf. Computing Frontiers, page 125-139. ACM, (2004)SNet, a flexible, scalable network paradigm for manycore architectures., , , and . NOCS, page 1-2. IEEE, (2013)CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs., , and . MICRO, page 247-258. IEEE Computer Society, (2006)